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Fine-feature patterning of self-aligned polymeric thin-film transistors fabricated by digital lithography and electroplating
- Applied Physics Letters
Jet-printed etch masks were used to define fine-feature patterns having a minimum size of 10 micrometers. The fine features were created using a digital-lithographic process having a minimum jet-printed spot size of 40-50 micrometers. A solution-plating process was use to deposit the gate metal electrode within the gap defined by the jet printing. Gate lengths of 10 micrometers were patterned with gate widths of 150 micrometers. Polythiophene-based thin-film transistor (TFT) devices were fabricated with channel width-to-length ratios of ~ 4. The p-channel TFT devices had on/off ratios of 10^7, threshold voltage of -1V, and field-effect mobility of 0.034 cm2/V•s.
citation
Wong, W. S. ; Chow, E. M. ; Lujan, R. A. ; Geluz, V. ; Chabinyc, M. Fine-feature patterning of self-aligned polymeric thin-film transistors fabricated by digital lithography and electroplating. Applied Physics Letters. 2006 October 2; 89: 142118.
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