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TECHNICAL PUBLICATIONS:
Stress-engineered MEMS
- Seminar at Stanford
After a little introduction to PARC, I'll describe how we've been using designed stress gradients (GPa/um) to make a variety of micro-devices. The focus has been on spring based electrical interconnects for electronics packaging. We'll describe various package test vehicles we've built and tested with micrometer scale structures (smaller and more compliant than other approaches). I'll also describe a high Q RF MEMS coil and other work devices we've demonstrated based on this technology.
citation
Chow, E. M. ; De Bruyker, D. ; Chua, C. L. ; Peeters, E. Stress-engineered MEMS. Engineering Seminar at Stanford University; 2008 October 27; Stanford, CA.
PARC authors
related focus areas
related publications
Microspring characterization and flip chip assembly reliability
Novel packaging with rematable spring interconnect chips for MCM
High current properties of a microspring contact for flip chip packaging
A package demonstration with solder-free compliant flexible interconnects
Wafer level packaging with soldered stress engineered micro-springs
