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INFORMATION SHEETS:

ClawConnect™ Compliant High-Density Interconnect
Enables advanced interconnects, packages, and testing for semiconductors and optoelectronics

 


PARC has invented and developed the ClawConnect™ compliant high-density interconnect (HDI) platform technology. This technology enables ultra-thin, ultra-small, high-performance solutions -- with low total cost of ownership and without sacrificing quality and reliability.

Future High Density Interconnect

 
 
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OVERVIEW:

PARC has invented and developed the ClawConnect™ compliant high-density interconnect (HDI) platform technology. This technology enables ultra-thin, ultra-small, high-performance solutions -- with low total cost of ownership and without sacrificing quality and reliability.

Customers continuously demand products that are thinner, smaller, higher-performance, and packed with more features, all at affordable prices. Unfortunately, many current approaches to advanced interconnects, packaging and testing are reaching their limits.

Benefits

PARC’s ClawConnect technology enables companies to continuously meet the future demands of customers.  This compliant HDI platform technology can:

  • Lower gap/height between chip and “substrate” – demonstrated down to 5μm
  • Tighten pitch – demonstrated down to 6μm
  • Address temperate coefficient of expansion (TCE) mismatches, enabling low-stress attach of large-area die and low-K dielectrics, and use of various substrates
  • Reduce process steps to make interconnections
  • Eliminate solder (or use solder to enable even higher compliance)
  • Enable rework during assembly and test of costly MCMs and MCPs
  • Eliminate fragile probe tips in wafer testing equipment

Applications that can realize multiple benefits include MCPs, MCMs, chip-on-board (COB), chip-on-carrier, wafer-level packaging (WLP), single in-line packaging (SIP), land-grid array (LGA), tab bonding, flexible electronics, hybrid silicon to printed electronics attachment, and interposers and probe cards.

Technology

ClawConnect example fabricationThe ClawConnect platform technology of compliant HDI between chip and substrate has the following capabilities:

  • High compliance
  • Z-axis movement (up to ½ length)
  • Large design space – lengths from 10 to 500+ μm
  • Tight linear pitch and scalable areal pitch
  • Low resistance
  • Resilient and reliable


These capabilities enable the benefits previously mentioned. ClawConnect can be manufactured using standard front-end or back-end manufacturing processes, potentially in less steps than current methods.  In the process, a stress gradient differential is created, causing the ClawConnect compliant HDIs to self-assemble (Figure 1).

ClawConnect in processor MCM application

PARC has manufactured numerous samples (e.g., figures 2, 3), using industry-standard materials.  Interconnect layer thicknesses are typically 1-2μm and overplate layers typically 1-5μm, depending on the interconnect dimensions. The process is very uniform, as tip heights (vertical distance above the substrate) vary by less than 5% and yields of 99.99% have been demonstrated.  PARC has fabricated ClawConnect on various substrates, such as silicon, organic, ceramic, and flexible ones.

 

ClawConnect in VCSEL application

PARC has conducted initial characterization and reliability tests. Compression vs. force and compression vs. resistance tests have demonstrated its resiliency. Low resistances are achievable, depending on design and materials chosen. Package (thermocycle, humidity, high current, shock) and fretting tests indicate strong reliability.

PARC is interested in partners who could use this technology in a commercial application.

More Information

contact Business Development