High Performance Throughput Computing

Throughput Computing, achieved through a new generation of microprocessors composed of multiple multi-threaded cores, can lead to performance improvements that are 10 to 30x those of conventional processors and systems. In this talk I will discuss how the value of a robust, high-performance single thread leads to even higher throughput rates. I will also describe some of the techniques we are implementing in future mainstream processors that accomplish the somewhat conflicting goal of attacking both latency and throughput.

Presenter(s)

Dr. Marc Tremblay is a Sun Fellow, Vice President, and Chief Architect for Sun's Scalable Systems Group. In his role Tremblay sets future directions for Sun's processor and system roadmap. His mission is to move the entire product line to the Throughput Computing paradigm, incorporating techniques he has helped develop over the past several years, including; Chip Multiprocessing, Chip Multithreading, speculative multithreading, and assist threading.

Prior to his current position, he was co-architect for Sun's UltraSPARC I, the MDR Microprocessor of the Year in 1995, and chief architect for the UltraSPARC II microprocessor. He was also the chief architect for the MAJC Program, which was nominated for best emerging technology in 1999 and best media processor in 2000 by MDR Analysts. He also started and architected the picoJava processor core, a Java bytecode engine.

Tremblay holds a M.S. and Ph.D. in Computer Science from UCLA and a B.S. in Physics Engineering from Laval University in Canada. He holds over 103 US patents in various areas of computer architecture. Tremblay was nominated for Innovator of the year by EDN Magazine in 1999. He was the Co-Chair of the Hot Chips 2000 Conference and most recently delivered the keynote address for The 31st Annual International Symposium on Computer Architecture (ISCA 2004) in Munich, Germany.

He taught a graduate course on computer architecture at Stanford in 2002. Tremblay is a member of IEEE and ACM.