Given a system design SD, a key task is to optimize this design with respect to minimizing the probability of failures, e.g., catastrophic failures. We consider the task of redesigning a system SD, by introducing components selected from a component library, in order to minimize the probability of particular faults. We have implemented a General Redesign Engine (GRE), which uses model-based reasoning techniques and Boolean functional synthesis from component libraries, to demonstrate redesign for combinational circuits. We empirically demonstrate that GRE trades-off redesign cost for increased fault tolerance, and shows a significant advantage compared to the Triple-Modular Redundancy (TMR) method for detecting and correcting a significant subset of observations leading to catastrophic (forbidden) modes. Our algorithm has a wide application in AI, including automated software and hardware design, error detection, reconfiguration and recovery, modular robotics, etc.
Feldman, A.; Provan, G.; de Kleer, J.; Kuhn, L.; van Gemund, A. Automated redesign with the general redesign engine. Eight Symposium on Abstraction, Reformulation and Approximation (SARA 2009); 2009 July 7-10; Lake Arrowhead, CA. Menlo Park, CA: AAAI Press; 2009.